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| CD4013BC Dual D-Type Flip-Flop October 1987 Revised January 1999 CD4013BC Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and "Q" and "Q" outputs. These devices can be used for shift register applications, and by connecting "Q" output to the data input, for counter and toggle applications. The logic level present at the "D" input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively. Features s Wide supply voltage range: s High noise immunity: compatibility: 3.0V to 15V 0.45 VDD (typ.) s Low power TTL: fan out of 2 driving 74L or 1 driving 74LS Applications * Automotive * Data terminals * Instrumentation * Medical electronics * Alarm system * Industrial electronics * Remote metering * Computers Ordering Code: Order Number CD4013BCM CD4013BCSJ CD4013BCN Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC and SOP Truth Table CL (Note 1) D 0 1 x x x x R 0 0 0 1 0 1 S 0 0 0 0 1 1 Q 0 1 Q 0 1 1 Q 1 0 Q 1 0 1 x x x No Change x = Don't Care Case Note 1: Level Change Top View (c) 1999 Fairchild Semiconductor Corporation DS005946.prf www.fairchildsemi.com CD4013BC Schematic Diagrams Logic Diagram www.fairchildsemi.com 2 CD4013BC Absolute Maximum Ratings(Note 2) (Note 3) DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260C (Note 3) 700 mW 500 mW -0.5 VDC to +18 VDC -0.5 VDC to VDD +0.5 VDC -65C to +150C Recommended Operating Conditions (Note 3) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) +3 VDC to +15 VDC 0 VDC to VDD VDC -40C to +85C Note 2: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The tables of "Recommended Operating Conditions" and "Electrical Characteristics" provide conditions for actual device operation. Note 3: VSS = 0V unless otherwise specified. DC Electrical Characteristics Symbol IDD Parameter Quiescent Device Current VOL LOW Level Output Voltage Conditions VDD = 5V, VIN = VDD or VSS VDD = 10V, VIN = VDD or VSS VDD = 15V, VIN = VDD or VSS |IO| < 1.0 A VDD = 5V VDD = 10V VDD = 15V -40C Min Max 4.0 8.0 16.0 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 0.52 1.3 3.6 -0.52 -1.3 -3.6 -0.3 0.3 3.5 7.0 11.0 0.44 1.1 3.0 -0.44 -1.1 -3.0 4.95 9.95 14.95 Min +25C Typ Max 4.0 8.0 16.0 0.05 0.05 0.05 +85C Min Max 30 60 120 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 1.5 3.0 4.0 Units A A A V V V V V V V V V V V V mA mA mA mA mA mA VOH HIGH Level Output Voltage |IO| < 1.0 A VDD = 5V VDD = 10V VDD = 15V VIL LOW Level Input Voltage |IO| < 1.0 A VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V VIH HIGH Level Input Voltage |IO| < 1.0 A VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V IOL LOW Level Output Current (Note 4) VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V 0.88 2.25 8.8 -0.88 -2.25 -8.8 -10-5 10-5 -0.3 0.3 0.36 0.9 2.4 -0.36 -0.9 -2.4 -1.0 1.0 IOH HIGH Level Output Current (Note 4) IIN Input Current A A Note 4: IOH and IOL are measured one output at a time. 3 www.fairchildsemi.com CD4013BC AC Electrical Characteristics TA = 25C, CL = 50 pF, RL = 200k, unless otherwise noted Symbol CLOCK OPERATION tPHL, tPLH Propagation Delay Time Parameter (Note 5) Conditions VDD = 5V VDD = 10V VDD = 15V Min Typ Max Units 200 80 65 100 50 40 100 40 32 350 160 120 200 100 80 200 80 65 15 10 5 ns ns ns ns ns ns ns ns ns s s s ns ns ns MHz MHz MHz tTHL, tTLH Transition Time VDD = 5V VDD = 10V VDD = 15V tWL, tWH Minimum Clock Pulse Width VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V tRCL, tFCL Maximum Clock Rise and Fall Time tSU Minimum Set-Up Time 20 15 12 2.5 6.2 7.6 5 12.5 15.5 150 65 45 90 40 25 5 40 30 25 fCL Maximum Clock Frequency VDD = 5V VDD = 10V VDD = 15V SET AND RESET OPERATION tPHL(R), tPLH(S) tWH(R), tWH(S) CIN Minimum Set and Reset Pulse Width Average Input Capacitance Propagation Delay Time VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Any Input Note 5: AC Parameters are guaranteed by DC correlated testing. 300 130 90 180 80 50 7.5 ns ns ns ns ns ns pF Switching Time Waveforms www.fairchildsemi.com 4 CD4013BC Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Package Number M14A 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com CD4013BC Dual D-Type Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. |
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